ASIC Verification and Validation Development Engineer
Ayar Labs is a fast-growing startup looking for a uniquely talented engineer who can build our ASIC test program. If you have diverse experience with verification, validation, and manufacturing test (wafer sort), then this is your opportunity to create the ASIC test infrastructure which is a critical part of bringing our vision of optical I/O to market. On your first day you will begin to work with the Design Team to understand the DFT and to develop a plan for simulation coverage and test coverage. You will develop and implement the pre-silicon simulations to verify design. Then you will leverage insights gained to develop and implement a test plan on wafer ATE at a Test House. While the test program and tester configuration will be handled by the vendor, you will own the details of the test and have the hands-on experience with ATE required to move problems out of the way.
Key Responsibilities
- Define, develop, implement, and support design verification simulations for silicon photonic ASIC
- Define, develop, implement, and support ATE test plan for wafer validation and wafer sort
- Understanding of DFT insertion techniques including SCAN, ATPG, and LBIST
- Identify gaps in verification or test coverage and design and implement new tests to improve coverage
- Test and validate product design compliance with margin to specification across all functional areas of the products
- Review technical specifications and interfaces for conformity to design guidelines and functionality
- Interpret test data and create reports based on the results
About You
- BS or MS in Electrical Engineering or Computer Engineering (or similar) plus 5 years experience; or Ph.D. in same plus 2 years experience
- Ability to work with architecture, design, hardware, and firmware engineering teams to design and develop simulations and test
- Able to move quickly by identifying the most critical functionalities requiring coverage
- Self-motivated to deliver quality results in a timely manner
- Work well in a team environment
- Collaborate across geographic sites and time zones
Preferred Skills
- Familiarity with reading and understanding RTL
- Understanding of DFT insertion techniques including SCAN, ATPG, and LBIST
- Ability to read and understand FW code
- Ability to analyze and understand complex architecture, firmware, software, and hardware specifications
- Excellent written (white papers) and oral communication skills