Job Title - Sr. Principal, R&D Process Integration Engineer
Length - Full Time
Location – Santa Clara CA
Job Description
Sr. Principal, R&D Process Integration Engineer
ON Semiconductor (Nasdaq: ON) is driving energy efficient innovations, empowering customers to reduce global energy use. The company is an industry leading semiconductor manufacturer that offers a comprehensive portfolio of energy efficient power and signal management, logic, discrete and custom solutions. Products produced by the company help design engineers solve their unique design challenges in automotive, communications, computing, consumer, industrial, IoT, medical and military/aerospace. ON Semiconductor operates a responsive, reliable, world-class supply chain and quality program, and a network of manufacturing facilities, sales offices and design centers in key markets throughout North America, Europe and the Asia Pacific regions. For more information, visit
http://www.onsemi.com.
Job Summary:
As an R&D Process Integration Engineer, you will be responsible for definition of the pixel and corresponding process integration scheme. You will work with internal teams (Marketing, R&D, Design, etc.) and foundry from early R&D to manufacturing for image sensor products. You will get a chance to lead technical projects and showcase your problem-solving skills.
Responsibilities:
During early development phase, you will be responsible for-
Leading projects and communicating information effectively to multiple teams across various time zones.
Definition of the pixel architecture and corresponding process integration schemes.
Creating design rules for image sensors.
Helping create and evaluate IPs to use at the foundry.
Providing solutions to circuit designers to reduce power and make power-performance tradeoffs.
Working closely with other teams to define the specs and requirements, run feasibility study, improve the existing processes, design, implement, and analyze the electrical data of DOEs (Design of Experiment) to recommend the best possible methods for the existing and future products.
Handling tapeout of parts to the foundry and manage the silicon movement to meet aggressive schedules.
Working closely with product engineering teams to perform EFA & PFA at the foundry and ensure yield issues are resolved quickly.
Working with other engineering teams to come up with solutions to improve imager quality and performance.
Qualifications
Requirements:
8-10 years experience in Process Integration, with background in CMOS Image Sensor preferred.
MSEE or PhD with an emphasis on Semiconductor Device Physics or related field.
Ability to understand as well as create circuit layouts and schematics and run DRC and LVS. Knowledge of the pixel architecture and operation is preferred.
Know how to build topological and electrical design rules understanding limitations of fab tools.
Experience in definition, implementation and analysis of Design of Experiment (DOE) using tools like JMP.
Knowledge of optics/optoelectronics in silicon Front Side and Backside Illumination applications is a plus
Best,
Kushal Shah
APN Software Service INC
609-357-9180 (Direct)