Analog CMOS IC Design Engineer (ASIC)

Job Title – Analog IC Design Engineer (ASIC)
 
Location: 1762 Automation Parkway, San Jose, CA 95131
 
Length - Permanent job
 
DESCRIPTION
Work with partners on the design process of the analog components.
Together with the design engineering team from the partners, identify design solutions for the specifications of the module / function.
Review the circuit design of amplifier i.e., transimpedance amplifier (TIA), variable gain amplifier (VGA), programmable gain amplifier (PGA), operational amplifier (OPA), operational transconductance amplifier (OTA), differential amplifier, buffer amplifier, and cable driver, analog switch, voltage reference, current reference, current mirror, and voltage regulator, down to transistor level.
Conduct schematic level, layout level verification of the designs.
Work closely with the partner to conduct function / performance tests and verification after tape out.
Support the sub-system level integration.
Generate and / or review related IP documents.
 
REQUIREMENTS
Ph.D. with 2+ years of hands-on experiences, or master with 5+ years hands-on experiences, or bachelor with 8+ years hands-on experiences, in electrical engineering. 
Hands-on experiences of analog IC design, layout, verification, tape out, and testing. Familiar with Bipolar, CMOS, and BiCMOS process. 
The successful candidate should be a team player and should have self motivation, initiative, dedication, and strong communication skills. 
 
The candidate should also have the following specific skills or experience:
High performance OPA, OTA, TIA, LNA and buffer / cable driver design, layout, tape out and test
High performance variable gain amplifier (VGA) design, layout, tape out and test
High precision band gap reference, current source, current mirror, and linear regulator design, layout, tape out and test
High performance A-to-D convertor, D-to-A convertor design, layout, tape out and test
Analog switch / analog multiplexer (with or without buffer) design, layout, tape out and test
PLL and DDS IC design, layout, tape out and test
Switch regulator and class D amplifier IC design, layout, tape out and test
CMOS image sensor design, layout, tape out and test
Passive and active filter design, layout, tape out and test
 
Best,
Kushal Shah
APN Software Service INC
kushal@apninc.com

Want to apply later?

Type your email address below to receive a reminder

ErrorRequired field

Apply to Job

ErrorRequired field
ErrorRequired field
ErrorRequired field
Error
Error
insert_drive_file
insert_drive_file