Location: Dallas TX
Duration: 6-12 Months
- Strong digital design basics, RTL design, exposure to the designs like ADC/DAC.
- Good understanding of Synthesis, DFT and Timing.
- Must be able to perform front-end and back-end digital IC design functions
- Digital circuit and system design, analysis & simulation
- Develop performance specification for digital circuits to meet product requirements
- Digital circuit and system architecture definition and implementation to meet performance specifications
- Interface with analog/mixed-signal blocks for simulation, co-design and control algorithm verification
- Responsible for the entire digital design flow of complex integrated mixed signal ICs.
- Able to go from spec to GDSII/LAFF handoff for import into Analog top level.
- Define architecture and execute design of critical digital system functions such as supply sequencing, peripheral control, serial interface, local memory and external uP interface/control.
- Work with analog designers - during definition and design phases - to define topology of digital subsystems and interface with analog blocks
- Provide approximate digital section area estimate based on function description
- Optimize digital subsystems in order to minimize risks due to analog/digital interaction
- Design of complex digital state machines including analog/digital domain synchronization.
Specific Skills Required:
- Digital circuit design, simulation, test bench development, functional verification, code coverage, DFT, Scan (stuck@ & transitional), TDL generation, digital self- checkers & simulation script development (at least 3-5 years)
- Custom RTL/VERILOG coding (at least 3-5 years)
- Static timing analysis, place and route, synthesis (at least 3-5 years)
- State-machine design (at least 1-3 years)
- Asynchronous design across clock domains (at least 1-3 years)
- Digital IP analysis, reuse and validation (at least 1-3 years)
- Digital Place & Route (using Athena flow), Equivalence, IR Drop Analysis plus floor-planning (at least 3-5 years)
- Serial & parallel digital communication interface design (at least 1-3 years)
- Timing Controllers & time domain synchronization (at least 1-3 years)
- Digital and analog co-simulation, control algorithm development and functional verification in a mixed-signal design environment (CADENCE, AMS etc.; at least 1-3 years)
- Excellent design documentation skills